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List of Desings under Outstanding Category | ||||
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Sl No | Full Name | Institute / Organization name | Design Name | Certificate |
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1 | Abhijeet Patnaik | Sankalp Semiconductor Pvt Ltd | Design of an Adjustable Low Drop-out Regulator | Download |
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2 | Amit sarkar | Maulana Abul Kalam Azad University of Technology | Four-Quadrant Analog Multiplier based on square rooting circuit | Download |
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3 | Aniruddha Khade | Mtech. IIT Bombay. | Low Voltage PLL using Feedforward Ring VCO with supply voltage noise compensation | Download |
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6
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4 | BISHAL KUMAR GUPTA | Defence Institute Of Advanced Technology | Design of CMOS based Charge Pump Phase Lock Loop with 28nm Technology | Download |
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7
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5 | Dhairya Arora | Birla Institute of Technology and Science, Pilani | Voltage control Ring oscillator with differential gain stage | Download |
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8
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6 | Kripanshu Kumar | Chandigarh College of Engineering & Technology | 0.9V-3.3V Logic General Purpose Input Output | Download |
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9
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7 | Mohammad Mudakir Fazili | NIT Srinagar | Low-Power Schmitt Trigger Based 10T SRAM Cell | Download |
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10
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8 | NIKHIL | NIT (National Institute of Technology, Jamshedpur, Jharkhand-831014) | 5-Line-to-32 line-Decoder/Demultiplexer using IC 74AC11138 i.e. 3:8 Decoder/Demultiplexer | Download |
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11
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9 | S Vidya | Motilal Nehru National Institute of Technology (MNNIT), Allahabad | COMPARISON BETWEEN SINGLE STAGE OP-AMP & TWO STAGE OP-AMP | Download |
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12
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10 | Salai Pragadeshwaran B | National Institute of Technology Trichy | Four-Quadrant CMOS Analog Multiplier | Download |
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11 | Shubham Tomar | Dhirubhai Ambani Institute of Information and Communication Technology | Design of Phase Locked Loop using 28nm CMOS technology | Download |
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14
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12 | SHUBHANG SRIVASTAVA | Indian Institute of Technology Jammu | Double Stage OTA | Download |
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13 | SIDDHARTH PAL | Indian Institute of Technology Kharagpur (IIT-KGP) | Start-Up Circuit with Zero Steady State Current | Download |
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14 | Soumitro Vyapari | Indian Institute of Technology Tirupati | Design and Simulation of a Gilbert Cell based Mixer on CMOS 28nm Technology | Download |
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17
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15 | Tarush Singh | MCT Rajiv Gandhi Institute of Technology | Dynamic-gate-control-based-4-stage-charge-pump | Download |
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18
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16 | Trinath Harikrishna | SRM IST | Differential End Current Starved VCO for the application of PLL implemented in 28nm CMOS Technology | Download |
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19
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17 | ULLAM KAVYA | National Institute of Technology Goa | Curvature Compensated CMOS Band Gap Reference Circuit | Download |
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19
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18 | Rohin Bhandari | Columbia University | Fractional Divider based 3-bit Fractional 4-div PLL using 28nm CMOS Technology | Download |